First images of subnano pore structures

June 10, 2010 03:00 am | Updated 03:00 am IST

To help maintain the ever-increasing power and performance benefits of semiconductors the industry has introduced very porous, low-dielectric constant materials to replace silicon dioxide as the insulator between nano-scaled copper wires. This has sped up the electrical signals sent along these copper wires inside a computer chip, and at the same time reduced power consumption.

In the quest for faster and cheaper computers, scientists have imaged pore structures in insulation material at sub-nanometre scale for the first time. Understanding these structures could substantially enhance computer performance and power usage of integrated circuits, say Semiconductor Research Corporation (SRC) and Cornell University scientists.

The techniques developed look deeply, as well as in and around the structures, to give a much clearer picture so complex processing and integration issues can be addressed.

The scientists understand that the detailed structure and connectivity of these nanopores have profound control on the mechanical strength, chemical stability and reliability of these dielectrics. With the recent announcement, researchers now have a nearly atomic understanding of the three-dimensional pore structures of low-k materials required to solve these problems, according to a Cornell University press release .

SRC and Cornell researchers were able to devise a method to obtain 3-D images of the pores using electron tomography, leverages imaging advances used for CT scans and MRIs in the medical field, says Scott List, director of interconnect and packaging sciences at SRC. “Sophisticated software extracts 3-D images from a series of 2-D images taken at multiple angles. A 3-D image at near atomic resolution gives the semiconductor industry new insights into scaling low-k materials for several additional technology nodes.”

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