RISC-V, a free and open ISA enabling a new era of processor innovation through open standard collaboration, is witnessing a large momentum towards open instruction set architecture and its impact is felt across the semi-conductor industry globally, RISC-V Foundation Chairman Krste Asanovic said here on Monday
The RISC-V delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation.
Driving the trend are features of RISC-V ranging from cost, since no licence fee has to be paid, flexibility in terms of extensible software as well as the customisation of the application, explained Mr. Asanovic, who is also a co-founder of SiFive, a US firm that helps system designers reduce time-to-time market with customised RISC-V based semi-conductors.
In a media interaction on the sidelines of the first in the six city RISC-V Tech symposium tour that rolled out in Hyderabad, he said governments around the world are also keen on harnessing the benefit of the the open standard. The symposium series is being organised by SiFive in association with the Bengaluru-based Open-Silicon, which the former had acquired a few months ago.
Israel is funding a start-up incubator to develop chips using RISC-V standards, while in Japan, the government is funding an effort in building AI based on RISC-V. The US Department of Defence has mandated RISC-V to be used in all their security research, he said.
Scientist and former Director General of DRDO Keshav Dattatreya Nayak said the Union Ministry of Electronics and Information Technology was spearheading the India Microprocessor Programme. The Centre for Development of Advanced Computing and IIT-Madras played a major role. Former Union Minister MM Pallam Raju underscored the significance of RISC-V.
To queries on SiFive and Open Silicon, he said they were keen on engaging with start-ups and small companies. He said there were plans to raise the headcount.
Design idea contest
At the event, SiFive also announced a design contest in India, to enable some of the most underutilised ideas from academia, students, research institutions and open source communities. SiFive will collaborate with the best ideas and provide the winners’ access to custom CPU IP, design support and help delivering working samples for the chip. The contest will run from August 21 to November 30.
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