Nanomagnet assembly to make up efficient logic gate

Disruptive:Magnetic chips can show drastic reduction in power consumption, says Santhosh Sivasubramani.

Disruptive:Magnetic chips can show drastic reduction in power consumption, says Santhosh Sivasubramani.  

A group at Indian Institute of Technology (IIT) Hyderabad has proposed a novel design methodology for constructing an adder logic gate using nanomagnets from magnetic quantum dot cellular automata. At a stage when conventional CMOS (Complementary metal oxide semiconductor) devices are approaching a saturation in terms of power efficiency, this comes as an effective step towards a complementary approach. AI applications such as speech and face recognition, used for instance in self-driving cars, require 3D cameras and real-time processing. These are computation-intensive and in dire need of efficient solutions. This technology is a complementary solution to CMOS devices in this, being both power efficient and non-volatile. In a paper published in IEEE Transactions in Nanotechnology, the group shows how modifying the shape and alignment of the nanomagnet assembly can improve earlier models of such adders.

Santhosh Sivasubramani, research scholar and the first author of the paper, explains the advantage: Power dissipation in CMOS logic circuits can be divided into dynamic and static dissipation. The former is caused by on-currents passing through the CMOS logic gates due to logic operations, and the latter by leakage currents in the CMOS gates even during standby mode in which no logical operations are executed. If the system is turned off, it loses its state data; however, in nanomagnetic computing, it possess the property of non-volatility. “Dramatic reductions in power consumption are possible in magnetic chips down to as little as one-millionth the amount of energy per operation used by transistors in modern computers,” he says.


Initially, around year 2000, copper wires were used in the circuit along with the nanomagnets. However, the size of these wires were large compared with the nanomagnets. This group, under the leadership of Amit Acharyya from Department of Electrical Engineering, IIT Hyderabad, tried and succeeded in using graphene wires which circumvented this problem. “Now, to make the logic gates, we are proposing nanomagnets with special shape and alignment,” says Dr. Acharyya.

To obtain a MQCA (Magnetic Quantum-dot Cellular Automata) circuit that performs a logic operation, such as addition, normally three oval nanomagnets need to be used for input and one for output . Further, the input nanomagnets need to be driven by an external driver magnet.

The two techniques the team advocates are using slant-edged nanomagnets (which are rectangular in shape but with a slant cut at one corner) and also those that are aligned at 45 degree angle with respect to the other nanomagnets used. This drastically reduces the number of nanomagnets needed and also the power consumption. “We already have undertaken the work on getting 32-bit and 64-bit adder circuits developed using this proposed concept so that larger circuits implementation will become feasible,” says Dr. Acharyya.

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