‘India as a talent pool and a market for design automation’ is one of the topics that Rahul Arya – Director of Marketing & Technology Sales in Cadence Design Systems (I) Pvt Ltd, Bangalore ( >http://bit.ly/F4TRahulArya ) – brings up during a recent interaction with Business Line.
Talent is of essence in a knowledge-intensive sector such as electronic design, he begins. “India produces a large number of electronics and computer science graduate engineers every year. While there is no dearth of manpower, the challenge is in finding ‘design aware’ engineers who are trained specifically in VLSI (Very Large Scale Integration) design and who can ramp up quickly. Simply put, the industry is facing a ‘quality gap’ with regard to talent.”
Acknowledging that there are several courses on offer to students for augmenting their college learning with specific VLSI design training, and for bridging the gap to some extent, Arya adds that to correct the gap in the long-term, there are several lessons we can learn from educational institutions abroad. Such as, facilitating industry interactions, focusing on research, bringing an application-orientation rather than a theory-focused approach, and encouraging an entrepreneurial mindset, he elaborates. Our conversation continues over the email.
Excerpts from the interview
Were you to trace the growth of design automation over the decades, what are the three or four key stages in its evolution?
From the technology perspective, electronic design automation (EDA) has made considerable leaps over the past two decades – from manual drawing of the transistors, to basic tool sets, to today’s advanced flows and methodologies that help increase productivity to meet today’s tight time-to-market windows.
Today, semiconductor makers are facing projected SoC (System-on-a-Chip) development costs of $100 million at 32 nm (nanometre) and below. One result of these pressures is that fewer companies will be design creators and more will become integrators who make heavy use of pre-designed IP (intellectual property), including both hardware and software.
The needs of integrators are different from those of creators. Creators are concerned about productivity gap whereas integrators are more concerned about a lesser-known profitability gap. There is a need for EDA to evolve and to close that gap by enabling integration-optimised IP creation and selection, IP integration into SoCs and systems, and system cost optimisation.
From the business perspective in India, the Indian semiconductor ecosystem evolved in its first avatar 1.0 on the platform of cost arbitrage. With pioneers like TI and Cadence setting up their India Design Centers (IDCs) over 20 years ago, the world started to look at India as a nation with burgeoning engineering talent.
India 2.0 saw companies moving up the value chain by owning up end-to-end designs and enjoying a greater sphere of influence. Over the years, IDCs established themselves through consistent execution and by building up competencies in areas such as software and hardware design, and embedded design. To take India 2.0 a step further, there are several companies that have moved to product definition and development, especially keeping the local and other emerging markets in mind.
In the next avatar of India 3.0, systems companies are finding differentiation and value through the creative, innovative applications or “apps” that end consumers are demanding. This is true not only in the mobile handset world, where iPhone and Android are obvious examples, but in any sphere where there’s a processor. With opportunities in infotainment, telecom, space and defence, the mindset change – from being chip design “creators” to system design “integrators” – will be the way forward.
Your views on the research work in Indian campuses among the academia
Research work is accorded priority at most top engineering schools in developed countries, and they get grants from the industry to pursue research. Such industry- academia partnerships are not fully developed in the Indian education system. As a result we have a number of fresh graduate engineers who have a mindset that veers towards solving operational problems but not necessarily a mind that is attuned to original or abstract thinking for problem-solving.
Students abroad also find value in pursuing doctoral (PhD) degrees because the career opportunities encompass both academics and industry, both of which are attractive options in terms of prospects, compensation and job satisfaction.
The lack of funds for high-quality research and the fact that not many good students pursue Masters or doctoral degrees in India creates a serious problem: students do not consider academics as a viable career option like they do abroad. Hence the best minds are joining the industry, whereas what is needed is to attract them to a career in academics and research. Better academicians and research have multiple benefits, such as improving the quality of our graduates and fostering an academic mindset in the next generation of engineers.
Taking a shot at the future, would you like to outline the way forward for design automation?
The fundamental manner in which electronic design is being done is now changing and will continue to change in the future.
Systems companies are demanding that their semiconductor suppliers provide not just silicon but application-ready hardware/software platforms – in other words, application- driven design.
Because EDA plays a crucial role in electronic design, this new paradigm has a profound effect on EDA. The new world of application-driven design requires a broader view of EDA – a view that we at Cadence have dubbed EDA360. Cadence is following a strategy based on the EDA360 vision that includes three important capabilities:
• Silicon realisation – everything it takes to get a design into silicon, including extensive mixed-signal capabilities.
• SoC realisation – extends IP integration to include software like drivers and diagnostics.
• System realisation – the development of a complete hardware-software platform that provides all necessary support for end-user applications.
Taken together, these capabilities combine the top-down approach of “what is needed” with the bottom-up approach of “what is possible.”
The traditional EDA domain of silicon realisation remains a crucial foundation. But EDA must also embrace SoC and silicon realisation issues such as hardware-software integration and integration-optimised IP in order to support the apps-driven, platform- based design that is prevalent today.
This EDA vision is broader than just Cadence, and all the capabilities can’t be delivered by just one company. Multiple companies in EDA, IP, software, and other areas will need to work together to bring all of the EDA capabilities to life so we can design the solutions we need for energy conservation, the environment, health care, education, and transportation. Embracing the challenges and opportunities of EDA will enable the electronics industry to continue driving both productivity and profitability into the next decade.
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