Cutting power consumption, securing data are key hardware challenges in the wireless world
By 2015, by several industry estimates, over 5.5 billion mobile devices will be connected to the Web. In the developed world, the concept of an ‘Internet of things’ — where networks connect cars, machines or electrical equipment rather than people — is no more the stuff that sci-fi is made of.
And at the heart of this intelligent network, or the ‘Internet of things’, is a robust communications infrastructure. The “dramatic growth” of wireless devices poses tall challenges in embedded processing, says Tom Deitrich, senior vice-president and general manager – networking and multimedia solutions group at Freescale Semiconductor. In a freewheeling chat with The Hindu, on the sidelines of the Freescale Technology Forum, held here recently, Mr. Deitrich spoke on rapid advancements and challenges in process technologies (in the embedded technologies field), advancements in automotive chipsets and key challenges in keeping pace with the growing infrastructure demands of a wireless world.
Today, Mr. Deitrich says, most people have a minimum of three devices. Pointing to the mobile phone that records his interview, he explains how everything from transferring this file to another device to parsing the data uses heavy networking infrastructure. “Think about all the network consumption at each stage; it’s even worse with video. There’s a mobile data tsunami that requires OEMs (original equipment manufacturers) and carriers to dramatically boost network performance while controlling capital expenditure costs, increasing power efficiency and supporting the emergence of 4G technologies.”
The challenge here, he explains, is to build a secure network that keeps up with the spiralling demand, while controlling or reducing energy consumption and equipment cost.
But that’s easier said than done, he admits. He explains how one product portfolio of base station-on-chip products integrates communications processing, digital signal processing and wireless acceleration technologies into a single system-on-chip (SoC) in various configurations, optimised for next-generation femtocell, picocell, metrocell and macrocell base stations.
“This integration lowers part counts and delivers significant power, cost and footprint reductions for base stations. Significantly, the architecture is common across the cells, allowing for software reuse and optimising R&D investments,” he explains.
As the number of transistors on a chip grows, and multicore processing enables higher and higher levels of processing, a key challenge is decreasing power consumption.
Besides data security and device size, power expenditure poses a bigger challenge in wireless networks. Mr. Deitrich explains that Freescale is developing a wide array of power management techniques at the process level. For instance, he explains the concept of cascading power management, a key research area for the company. What this does is steers tasks to a smaller number of cores during non-peak activity periods, so that the idle cores can enter a minimal-power or “drowsy” state. When packet traffic increases again, the technique allows a rapid return to fully loaded conditions.
Mr. Deitrich puts this in perspective by pointing to any cellphone tower, where the traffic obviously slows down as the night approaches, perhaps to a few packets in the wee hours of the morning. This then picks up again as the day progresses, reaching a peak during work hours. “With this, cores can achieve reduced energy consumption under light network loads and then automatically return to full function when network loads increase,” he explains, adding that this not only saves a great deal of power, but also provides a more efficient way to distribute packet processing loads among cores on an SoC.
Mr. Deitrich speaks at length about the new Layerscape architecture, a development that he spoke of at length in his keynote address at the Freescale Technology Forum.
“I’m excited because I see it speeding up innovation in the embedded sector,” he says. This new architecture, unveiled a few months ago, is the industry’s first “software-aware, core-agnostic networking systems architecture”.
How is this a game changer? Mr. Deitrich explains that it is easy to programme (in high-level or human-friendly languages), and offers the flexibility and scalability needed to deal with the exponential increase in connected devices.
Designed with intelligent networking applications in mind, its architecture innovations include enabling power architecture and ARM-based cores, making it “unique and exciting”.
At the cutting-edge of innovation in the automotive embedded technology field, Freescale’s focus is on designing chipsets and circuits that help improve fuel economy or increase energy efficiency, improving vehicle safety and consumer “in-car experience”, all catering to the rigorous and increasing demands of the modern automotive industry.
When asked what’s most exciting in the Freescale automotive lab, Mr. Deitrich talks about i.MX product line that power infotainment/ telematics systems, currently deployed by more than 10 world-class automotive equipment managers.
“Our forthcoming dual and quad-core i.MX 6 product presents extremely compelling automotive applications moving forward,” he says. For instance, he explains that they have demonstrated surround-view camera systems for auto applications, which takes input from four cameras placed around a car, then stitches them together for a virtual top view.
In this system, the camera images are connected by Ethernet, and sent to the central processor. Each image is time-stamped, and then the i.MX processor stitches the properly time-stamped images together, and shows them quickly enough for the human eye to see them as video. These technologies, he explains, have a wide range of applications in safety apps, a 77 gigahertz radar for collision avoidance and adaptive cruise control, to mention a few.
‘Back on track’
In 2009, during a particularly rough patch, globally, Freescale retrenched around 250 employees from the cellular product group in Bangalore. Today, when asked if things are looking up for the company, Mr. Deitrich says, “We’re absolutely back on track.”
Currently, its design centres employ around 1,000 engineers.
“These teams are involved in hardware development, IP development, SoC design, software development, and tools development. The India teams for Freescale’s networking business are leading the way on SoC designs, software, and tools development. Many of the most advanced designs, including Layerscape, are executed in India,” he elaborated.