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Intel's India team to provide mobile chip solutions

By Anand Parthasarathy

BANGALORE APRIL 22. Intel, the world's number one chipmaker is to put together a design team in India, the first in Asia, to provide mobile computing solutions around its recent `Centrino' technology. The Bangalore-based team initially numbering `several dozen' engineers will strengthen the 1000-strong development force that the company already has here. It will concentrate on chip sets and embedded software applications that will open up the company's initiatives in `Unwiring the Web', untethering notebooks and hand-held computers by exploiting wireless technologies.

The announcement was made today by the company's Israel-based Vice President for Mobile Platforms, David (`Dadi') Perlmutter, at the Intel Developer Forum (IDF) which opened here. In his keynote address he suggested that the present roadmap for silicon-based processors would continue till the end of the decade at the very least, remaining faithful to the well known industry `mantra' known as `Moore's Law' which predicts a doubling of chip complexity every 18 to 24 months.

By this year end, Intel processors would be fabricated to a packaging tolerance of 90 nanometers (a nanometer is a billionth of a metre) and a typical desktop processor like the Pentium would have over 100 million transistors on board the matchbox-sized slab of silicon. By 2009 this would have increased at least 8-fold and Intel researchers saw clear realisation of chips packed to 32 nanometers by then.

Intel India President, Ketan Sampat, told The Hindu that key R&D for the next generation Xeon processor for enterprise applications was being done at Intel's India labs and that researchers here were confident that the chip with one billion transistors on board would be unveiled around 2006.

Avtar Saini, Intel's Director, South Asia, and himself a key member of the team that visualised the Pentium chip, clarified that by selective tweaking, designers could optimise a chip's density, performance or power consumption.

While a chip like the Xeon would aim for peak performance, the new generation Centrino chips for mobile applications would aim to reduce power consumption.

Today electronics, tomorrow photonics

Delegates saw a protoype of an ultralight concept notebook that cut power requirement from 13 watts to 7 watts using lithium polymer batteries that effectively provided seven hours of uptime on a full charge. The conference concludes on Wednesday.

Delegates to the Intel Developer Forum now ongoing here, were provided a `sneak preview' of tomorrow's technology to move those digital ones and zeroes even faster. The name of the game is `silicon photonics'. Intel researchers have already realised some basic optical devices in silicon. A demonstration of a silicon optical modulator, showed how a laser light beam can be split into two, then one of the streams delayed in phase so that the reassembled beam could read `0' rather than `1'. By this technique an electrical stream of digital data could be converted into a pure optical signal.

This could then travel down fibre optic lines many orders of magnitude faster than today's electrical signals. Another demodulator at the other end would convert the signal back from optical to electrical — and the user would not know the difference.

More such optical building blocks were slated to be realised in silicon, the audience was told, holding out the hope of an `optical tomorrow' taking over from an `electronic today'.

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